Sandeep Anand

Gainesville, Florida United States

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“My area of interest includes Radio frequency engineering, VLSI ,computer Architecture, Wireless Communications, Digital Communications and Analog and Digital Design.”

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Sandeep's Short Bio

I am student at the University Of Florida . I am doing my Masters in electrical and Computer Engineering and carrying out research work in Radio Frequency Engineering at the University of Florida . I am dedicated and a hard-working Individual and I would like to Publish my thesis work by the end of this year .


Sandeep's Resume

Sandeep Anand
309, SW 16th Avenue, Apt 402 Mobile: 352-872-9446
Gainesville, FL-32601 anandjairam@ufl.edu

OBJECTIVE To work as an Intern and complete the work given to me in the field of Radio frequency circuits and Analog and Digital IC Design.

EDUCATION Master of Science, Electrical and Computer Engineering May 2010
University of Florida, Gainesville, FL, USA

Coursework: Radio Frequency Circuits, VLSI, Advanced VLSI, Wireless Communications,
Bipolar IC design, Digital Communications, Probability and Random Processes.

Bachelor of Engineering, Electrical Engineering May 2008
College of Engineering and Technology, Biju Patnaik University Of Technology, India 85.3%

Coursework: Digital Communication, Computer Networks, Power Electronics,
Digital Design, Analog Circuits, Computer Architecture, Database Management Systems

TRAINING Steel Authority Of India Ltd , Rourkela, India. May 2006-July 2008
EXPERIENCE Intern
• Worked on Programmable Logic Controllers in a Visual Basic Platform for temperature control of a steam turbine Alternator.
National Institute Of Technology, Rourkela, India.
Trainee
• Trained on Field Programmable Gate arrays and their Programming on a XILINX interface using VHDL.

SOFTWARE Programming languages: C, C++,VHDL
SKILLS Operating systems: MS DOS, LINUX and Windows
Technical Tools: MATLAB,CADENCE-Virtuoso, NI-Multisim, Agilent-ADS, XILINX, Model-Sim, Ansoft Designer, Quartus-2.

PROJECTS August 2008-March2009
• Design of a 128 bit Low Power SRAM , testing the Schematic and the Layout successfully using cadence virtuoso in Linux environment.
• Building a FM radio Receiver architecture using Matlab and ADS Agilent tools.
• Testing the OPAMP-741 and its variations using LT spice SwCad 3.
• Simulation Of a Vending Machine using Mentor Graphics(Model-Sim) and Altera Quartus-2.
• Implementation of Vending Machine (Layout and Schematic) using Cadence-Virtuoso and carried out a DRC and Netlist Match.

• Simulation of a GSM 900 Jammer using NI Multisim and Agilent ADS tools.
• Designing a continuous time Filter , a 4th order Band-pass Butterworth filter (Tools: LT-spice SwCad 3) and Cadence Virtuoso.
• Implementing a Digital PLL( Tools: Cadence Virtuoso, Xilinx , Model-sim, NC-Launch).
• Implementing the Supeheterodyne Dual IF FM receiver in a frequency range of 88-108 Mhz .
• Implementing the Newton’s Raphson Iteration Method using Matlab for determining better efficiency in Power transmission Lines ,
• Comparison of a SRAM and a high threshold voltage Sleepy SRAM (32 kbit).

(Tools : Cadence Virtuoso, Matlab , Model-Sim).


AWARDS
• Received University of Florida Achievement Award May 2008
• Received Merit Scholarship for excellent academic performance in all Four years of Undergrad coursework


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